(Photo Credit: Deming Chen

Deming Chen (middle) is all smiles while posing with co-author of the paper UCLA professor Jason Cong (left) and general chair of the IEEE Symposium on Field-Programmable Custom Computing Machines 2026 and Georgia Tech professor Callie Hao during the 34th annual IEEE International Symposium on Field-Programmable Custom Computing Machines on May 15 in Atlanta.)

Deming Chen certainly knows how to make a lasting impression. The Abel Bliss Professor of Engineering’s induction into the Association for Computing Machinery Special Interest Group on Design Automation (ACM/SIGDA)’s Technical Committee on Field-programmable Gate Array (TCFPGA) Hall of Fame is proof enough.

The TCFPGA Hall of Fame recognizes one academic paper per year that’s influential and widely recognized for its impact over the years. Chen’s 2004 paper, entitled DAOmap: A Depth-optimal Area Optimization Mapping Algorithm for FPGA Designs, stands the test of time.

The paper introduced a new algorithm, called DAOmap (depth-optimal area optimization mapping), which improved how digital logic is mapped onto field-programmable gate array (FPGA) hardware. The approach reduced the amount of chip area required while preserving performance, helping engineers create more efficient FPGA designs.

FPGAs are computer chips that can be reprogrammed after manufacturing, making them highly adaptable for a wide range of applications. They are used in communication systems, cloud computing, data centers, medical devices, automotive systems and increasingly in artificial intelligence technologies.

To take full advantage of FPGA hardware, engineers rely on software tools that translate designs into configurations the FPGA chips can execute efficiently.

“Think of the chip mapping like arranging furniture in a room,” Chen explained. “You want everything to fit, you want people to move through the room quickly, and you do not want to waste space.”

Chen’s new algorithm, known as DAOmap, addressed that challenge by helping engineers use FPGA resources more efficiently without sacrificing speed.

“Better FPGA design tools make these systems faster, more energy-efficient and more cost effective,” Chen said.

Chen’s findings essentially helped FPGA chip designs become smaller and more efficient without slowing them down.

The recognition is especially meaningful because of the Hall of Fame’s selectivity. Any FPGA-related paper published more than 10 years ago can be considered, but only one was chosen this year. The honor also highlights one of Chen’s earliest research contributions, completed while working with his doctoral adviser, University of California at Los Angeles professor Jason Cong.

“Seeing these ideas from the paper have remained relevant and have influenced modern FPGA synthesis tools more than two decades later is deeply rewarding,” Chen said.

According to Chen, the paper continues to resonate because it addresses a fundamental engineering challenge that remains important today: balancing performance, resource usage, and design efficiency.

“Even though FPGA technology has advanced dramatically, the underlying challenge of optimizing area, delay and logic duplication remains important,” Chen said.

An ACM fellow and active member of ACM SIGDA, Chen hopes the recognition further highlights Illinois’ leadership in computer engineering, design automation, reconfigurable computing and hardware-software co-design.

“It reinforces the importance of foundational research,” Chen said. “Sometimes an algorithmic idea developed many years ago continues to influence tools and systems for decades.”

He also hopes the honor inspires students and collaborators to pursue research that creates a lasting, practical impact.

Among his recent accomplishments is ScaleHLS, an open-source compiler framework that helps map PyTorch machine-learning models to customized FPGA accelerators. The project has been downloaded thousands of times by researchers around the world and aims to make hardware acceleration more accessible to AI researchers and system designers.

Chen is also proud of his work on Medusa, a speculative decoding technique designed to accelerate large language model inference. The technology was incorporated into NVIDIA’s TensorRT-LLM software, helping improve the speed and efficiency of AI applications.

“Both efforts aim to make AI and computing systems faster, more efficient and more accessible,” Chen said.

More broadly, Chen said, advances in hardware design and AI acceleration help support the computing infrastructure behind cloud services, health care technologies, scientific discovery and many other systems that shape everyday life.

Read the original article here.

The 2018 SingHealth cyberattack marked a pivotal year, necessitating a strategic shift in Singapore’s cyber landscape. Among the 1.5 million patients’ personal records exfiltrated, the targeting of the Prime Minister’s records clearly demonstrated the attacks’ sophistication.

How Did the Data Leak Happen

From the initial investigations, it was shown that one of the SingHealth workstations was infected with malware, which eventually resulted in the attackers gaining access to the database. Further observations of the data leak were also noted.

1. Lack of Security Awareness
System employees could not respond to the attacks effectively; they did not understand the implications of the signs of data leak, despite being alerted to a host compromise.

2. Incomplete Security Mitigations
The security team did not understand the scope of the suggested mitigations and only implemented them in a fragmented subset, in spite of performing regular risk assessments. As a result, the system was crippled with vulnerabilities in the system architecture design and software, which  was exploited to access patients’ data.

3. Lack of Continuous Security Solutions
There was insufficient attack detection and security monitoring in the key areas of the system architecture. 

Key Security Learnings

The 2018 SingHealth incident was a timely reminder that in order to maintain an effective defense, systems must evolve to adopt continuous cybersecurity monitoring across organizational and technical fronts. These key lessons are essential to develop resilience against complex threats.

1. Risk Assessments Insights
While risk assessments were conducted at least  twice prior to the 2018 cyberattack, the insights were neither properly conveyed to system operators nor comprehensively understood by the security management team.

2. Threat Identification Contextualization
Risk assessments should move away from hardcoded threats, which can be easily ignored due to their repetitive nature. Instead, such assessments should identify threats that are specific to the current system, including new security controls.

3. Attack Paths Prioritization 
Prioritizing risks solely based on asset classification was not only simplistic but also ineffective. It ignored the effects of connectivity and the links between system components. Furthermore, attackers could exploit this loophole by targeting lower-priority assets to reach high-value targets.

As systems increase in scale and complexity and cyberattacks become sophisticated, there is a need to develop a proactive and dynamic security strategy. One way to deter such data leaks from occurring is by applying good threat modeling practices to protect valuable assets against damaging attacks and to make systems resilient. Read more here.